In the field of non-volatile rewritable memories, different types of memories are used as a function of the targeted applications and performances. The memories the most commonly used, in particular in digital cameras, cell phones, portable computers, USB keys, and other portable devices, are memories called “Flash memories”. Flash memories offer, notably, high integration density, high impact resistance, and good durability.
Most commercially available non-volatile Flash memories use the storage of charges as principle for encoding information. In practice, a charge trapping layer (generally polysilicon, or a dielectric such as SiN) is encapsulated between two dielectrics in the gate stack of an MOS transistor. The presence or the absence of charge in this medium modifies the conduction of the MOS transistor and makes it possible to encode the state of the memory.
However, the evolution of microelectronics requires every greater miniaturisation of components and, in particular, non-volatile rewritable memories. Yet, the miniaturisation of Flash technology is limited, notably by the fact that the thickness of the charge trapping layer cannot be reduced below a minimum value (of the order of 6 nm) otherwise the information retention time would be decreased.
Recently, a new type of memory, called resistive random access memories, have appeared to replace Flash memories. These resistive random access memories are not based on the charge trapping of the gates of transistors, but on a change of state of a resistive block. Resistive random access memories, notably oxide-based resistive random access memories, known as OxRRAM, and resistive random access memories based on ion conducting material, known as CBRAM (conductive bridging random access memories), are based on a change of the resistance state (high or low resistance) of an active material integrated between two metal electrodes. This new type of memory enables not only high integration density but also high operating speed, great endurance and good compatibility with the manufacturing methods currently used in the microelectronics industry, in particular with end-of-line CMOS technology methods.
A resistive random access memory generally includes a plurality of memory cells, also called memory points. Each memory cell comprises a stack 10 of a first and a second electrodes, generally made of metal, and a layer made of active material, for example a metal oxide, arranged between the two electrodes. An example of a resistive random access memory cell is represented in FIG. 1. This resistive random access memory comprises a first electrode 11, a second electrode 12 and a layer made of dielectric material 13 laid out between the first and second electrodes. The second electrode 12 of the resistive random access memory is arranged in contact with a connector substrate 14 ensuring an electrical contact between a programming device and the stack. The programming device makes it possible to control the programming conditions, for example the programming voltage, applied to the electrodes 11 and 12 of the stack.
The layer made of dielectric material 13, also called active layer, is capable of switching, in a reversible manner, between two resistance states which correspond to the logic values “0” and “1” used to encode an information bit. Thus, a resistive random access memory stack can switch from a low resistance state (LRS) to a high resistance state (HRS) by the application of a first voltage VRESET between the first 11 and the second 12 electrodes, and switch back from the high resistance state HRS to the low resistance state LRS by the application of a second voltage VSET between the first and second electrodes. In particular, an information is written in the memory cell by switching the layer made of dielectric material from the high resistance state HRS, also called “OFF” state, to the low resistance state LRS, or “ON” state. Conversely, an information may be erased from the memory cell by switching the layer made of dielectric material from the state LRS to the state HRS. The writing operation in the memory cell is called “SET”; the erasure operation of said memory cell is called “RESET”.
Thus, during a writing operation, the dielectric material comprises a first resistance value and, during an erasure operation, it comprises a second resistance value, less than the first resistance value. The change in resistance of the dielectric material is governed by the formation and the rupture of a conductive filament of nanometric section between the two electrodes 11-12. According to our current state of knowledge, this filament seems to be due to different phenomena, depending on the type of material used for the layer of active material. In particular, in an OxRRAM type resistive random access memory in which the layer of dielectric material is oxide based, the change in resistance state seems to be explained by the formation of a filament of oxygen vacancies within said layer of dielectric material. In a CBRAM type resistive random access memory, in which the layer of dielectric material comprises an ion conducting material forming an ion conducting solid electrolyte arranged between an electrode forming an inert cathode and an electrode comprising a portion of ionisable metal, the change in resistance state seems to be explained by the formation of a conductive filament within the layer of dielectric material.
However, in resistive random access memories, there exists a certain variability in the resistance levels, both in the low resistance state LRS and in the high resistance state HRS. Indeed, at each operation of writing and erasure of the memory, the values of the resistance Roff in the high resistance state HRS and the values of the resistance Ron in the low resistance state LRS fluctuate, as represented by the fluctuation curves of the resistances Roff and Ron of FIG. 2.
Moreover, as the writing and erasure cycles of the memory progress, the levels of the resistances of the dielectric material drift, moving away more and more from the resistance values of the first cycles, as shown in FIG. 2. On account of these drifts, the writing and erasure conditions—for example the writing voltage or the erasure voltage—have to be modified to enable the writing or the erasure of a dielectric material. These modifications generally consist in applying a very high voltage or, quite the opposite, a very low voltage. Yet, the application of too weak writing or erasure conditions prevents any writing and the application of too strong writing or erasure conditions generates defects in the dielectric material, which degrades said dielectric material. The performances of resistive random access memories thus have a tendency to degrade more and more over cycles of writing and erasure. The endurance performances of these memories are thus relatively restricted.
To overcome this problem of endurance and thereby extend the lifetime of resistive random access memories, it is known to use a so-called “smart programming” method, which has the objective of compensating the defects that have built up in the course of several cycles of writing and erasure of the memory. To do so, the smart programming method proposes applying a compensation voltage which increases progressively until the dielectric material reaches a target resistance value. In other words, this method proposes determining a target resistance value considered as the optimal resistance value to reach. A compensation voltage—or a duration or a number of pulses at constant voltage level—intended to compensate the defects in the dielectric material, is next applied from a low value which is increased step by step until the resistance reaches the predetermined target value. The compensation conditions (voltage or pulse duration) are applied to compensate defects within the dielectric material not just in its low resistance state but also in its high resistance state.
FIGS. 3A and 3B represent curves, respectively, of the resistance values of the dielectric material and the values of the compensation voltage applied to the memory, in the course of cycles, when a smart programming method is used. As these curves show, when a writing (“set” curve) and erasure (“reset” curve) compensation voltage is applied, the value of the resistance increases. However, the increase in resistance values is only momentary, the resistance values again decreasing rapidly in the course of cycles following the application of the compensation voltage. Indeed, since the voltage compensation is only carried out after a certain number of cycles—for example at around 102 and 104 cycles in FIGS. 3A-3B—the memory has already greatly deteriorated when the compensation voltage is applied. This compensation thus camouflages the defects generated as the cycles progress, without however repairing them. Indeed, the defects of the dielectric material behind the modification of the resistance levels of the dielectric material are irreversible. Thus it is not possible to repair them, but only to compensate them.
Yet, the compensation of these defects with the smart programming method requires the application of strong compensation conditions, for example a high compensation voltage. Yet, strong compensation conditions generate new defects within the dielectric material; and the stronger the compensation conditions, the higher the number of defects.
To compensate the defects as precisely as possible, it could be envisaged to increase the level of the compensation conditions very slowly, with a very short step, until the level is reached that is just sufficient to compensate the defects, without generating too many additional defects. However, such a practice would be so long that it would not be exploitable industrially.